Gpu_Hal.cpp File Reference

GPU APIs. More...

#include "Platform.h"
#include "Gpu.h"
#include "Hal_Config.h"

Go to the source code of this file.

Functions
bool_t	Gpu_Hal_Init (Gpu_HalInit_t *halinit)
bool_t	Gpu_Hal_Open (EVE_HalContext *host)
void	Gpu_Hal_Close (EVE_HalContext *host)
void	Gpu_Hal_DeInit ()
void	Gpu_Hal_StartTransfer (EVE_HalContext *host, GPU_TRANSFERDIR_T rw, uint32_t addr)
void	Gpu_Hal_StartCmdTransfer (EVE_HalContext *host, GPU_TRANSFERDIR_T rw, uint16_t count)
void	Gpu_Hal_TransferString (EVE_HalContext *host, const char8_t *string)
uint8_t	Gpu_Hal_Transfer8 (EVE_HalContext *host, uint8_t value)
uint16_t	Gpu_Hal_Transfer16 (EVE_HalContext *host, uint16_t value)
uint32_t	Gpu_Hal_Transfer32 (EVE_HalContext *host, uint32_t value)
void	Gpu_Hal_EndTransfer (EVE_HalContext *host)
void	Gpu_Hal_WrCmdBufFromFlash (EVE_HalContext *host, PROGMEM prog_uchar8_t *buffer, uint32_t count)
uint8_t	Gpu_Hal_Rd8 (EVE_HalContext *host, uint32_t addr)
uint16_t	Gpu_Hal_Rd16 (EVE_HalContext *host, uint32_t addr)
uint32_t	Gpu_Hal_Rd32 (EVE_HalContext *host, uint32_t addr)
void	Gpu_Hal_Wr8 (EVE_HalContext *host, uint32_t addr, uint8_t v)
void	Gpu_Hal_Wr16 (EVE_HalContext *host, uint32_t addr, uint16_t v)
void	Gpu_Hal_Wr32 (EVE_HalContext *host, uint32_t addr, uint32_t v)
void	Gpu_HostCommand (EVE_HalContext *host, uint8_t cmd)
void	Gpu_HostCommand_Ext3 (EVE_HalContext *host, uint32_t cmd)
void	Gpu_Hal_Powercycle (EVE_HalContext *host, bool_t up)
void	Gpu_Hal_WrMemFromFlash (EVE_HalContext *host, uint32_t addr, const prog_uchar8_t *buffer, uint32_t length)
void	Gpu_Hal_WrMem (EVE_HalContext *host, uint32_t addr, const uint8_t *buffer, uint32_t length)
void	Gpu_Hal_RdMem (EVE_HalContext *host, uint32_t addr, uint8_t *buffer, uint32_t length)
void	Gpu_Hal_DLSwap (EVE_HalContext *host, uint8_t DL_Swap_Type)
void	Gpu_Hal_Sleep (uint32_t ms)
uint32_t	Gpu_CurrentFrequency (EVE_HalContext *host)
void	Gpu_ClockSelect (EVE_HalContext *host, GPU_PLL_SOURCE_T pllsource)
void	Gpu_PLL_FreqSelect (EVE_HalContext *host, GPU_PLL_FREQ_T freq)
void	Gpu_PowerModeSwitch (EVE_HalContext *host, GPU_POWER_MODE_T pwrmode)
void	Gpu_CoreReset (EVE_HalContext *host)
void	Gpu_Hal_Updatecmdfifo (EVE_HalContext *host, uint32_t count)
uint16_t	Gpu_Cmdfifo_Freespace (EVE_HalContext *host)
void	Gpu_Hal_WrCmdBuf (EVE_HalContext *host, uint8_t *buffer, uint32_t count)
void	Gpu_Hal_CheckCmdBuffer (EVE_HalContext *host, uint32_t count)
void	EVE_Cmd_waitFlush (EVE_HalContext *host)
void	Gpu_Hal_WrCmdBuf_nowait (EVE_HalContext *host, uint8_t *buffer, uint32_t count)
uint8_t	EVE_Cmd_waitFlush_status (EVE_HalContext *host)
void	Gpu_Hal_WaitLogo_Finish (EVE_HalContext *host)
void	Gpu_Hal_ResetCmdFifo (EVE_HalContext *host)
void	Gpu_Hal_WrCmd32 (EVE_HalContext *host, uint32_t cmd)
void	Gpu_Hal_ResetDLBuffer (EVE_HalContext *host)
int32_t	Gpu_Hal_Dec2Ascii (char8_t *pSrc, int32_t value)
void	Fifo_Init (Fifo_t *pFifo, uint32_t StartAddress, uint32_t Length, uint32_t HWReadRegAddress, uint32_t HWWriteRegAddress)
void	Fifo_Update (EVE_HalContext *host, Fifo_t *pFifo)
uint32_t	Fifo_Write (EVE_HalContext *host, Fifo_t *pFifo, uint8_t *buffer, uint32_t NumbytetoWrite)
void	Fifo_Write32 (EVE_HalContext *host, Fifo_t *pFifo, uint32_t WriteWord)
void	Fifo_WriteWait (EVE_HalContext *host, Fifo_t *pFifo, uint8_t *buffer, uint32_t Numbyte)
uint32_t	Fifo_GetFreeSpace (EVE_HalContext *host, Fifo_t *pFifo)
int32_t	Gpu_ClockTrimming (EVE_HalContext *host, int32_t LowFreq)
void	Gpu_ClearScreen (EVE_HalContext *host)
void	BootupConfig (EVE_HalContext *host)
void	Gpu_Hal_LoadImageToMemory (EVE_HalContext *host, char8_t *fileName, uint32_t destination, uint8_t type)

Variables
const uint8_t	DLCODE_BOOTUP [12]

Detailed Description

GPU APIs.

Author

Bridgetek

Date

2018

MIT License

Copyright (c) [2019] [Bridgetek Pte Ltd (BRTChip)]

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

Definition in file Gpu_Hal.cpp.

Function Documentation

BootupConfig()

void BootupConfig

(

EVE_HalContext *

host

)

Definition at line 1186 of file Gpu_Hal.cpp.

{
    Gpu_Hal_Powercycle(host,TRUE);
 
    /* FT81x will be in SPI Single channel after POR
    If we are here with FT4222 in multi channel, then
    an explicit switch to single channel is essential
    */
#ifdef FT81X_ENABLE
    Gpu_Hal_SetSPI(host, GPU_SPI_SINGLE_CHANNEL, GPU_SPI_ONEDUMMY);
#endif
 
    /* Set the clk to external clock */
#if (!defined(ME800A_HV35R) && !defined(ME810A_HV35R) && !defined(ME812AU_WH50R) && !defined(ME813AU_WH50C) && !defined(ME810AU_WH70R) && !defined(ME811AU_WH70C))
    Gpu_HostCommand(host,GPU_EXTERNAL_OSC);
    Gpu_Hal_Sleep(10);
#endif
 
    /* Access address 0 to wake up the chip */
    Gpu_HostCommand(host,GPU_ACTIVE_M);
    Gpu_Hal_Sleep(300);
 
#ifdef UPDATE_OTP
    #if defined(FT811_ENABLE) || defined(FT813_ENABLE)
    /* Download new firmware to JTouch to fix bug pen up */
    Gpu_Hal_WrCmdBuf(host, OTP_DATA_U8, OTP_DATA_LEN);
    EVE_Cmd_waitFlush(host);
    #elif defined(BT815_ENABLE) || defined(BT816_ENABLE) || defined(BT81x_ENABLE)
    Gpu_Hal_Wr8(host, REG_CPURESET, 3);
    Gpu_Hal_Wr16(host, REG_TOUCH_CONFIG, Gpu_Hal_Rd16(host, REG_TOUCH_CONFIG) & 0x7fff);
    Gpu_Hal_WrMem(host, RAM_JTBOOT, OTP_DATA_U8, OTP_DATA_LEN);
    //Gpu_Hal_WrCmdBuf_nowait(host, OTP_DATA_U8, OTP_DATA_LEN);
    //EVE_Cmd_waitFlush(host);
    Gpu_Hal_Wr8(host, REG_J1_COLD, 1);
    Gpu_Hal_Wr8(host, REG_CPURESET, 2);
    //Gpu_Hal_Sleep(10);
    //Gpu_Hal_Wr8(host, REG_CPURESET, 0);
    Gpu_Hal_Sleep(300);
    #endif
#endif
 
    /* Read REG_CHIPID to confirm 0x7C is returned */
    {
        uint8_t chipid;
        //Read Register ID to check if chip ID series is correct.
        chipid = Gpu_Hal_Rd8(host, REG_ID);
        while(chipid != 0x7C)
        {
            chipid = Gpu_Hal_Rd8(host, REG_ID);
            delay(100);
        }
 
        printf("VC1 register ID after wake up %x\n",chipid);
 
    }
    
    /* Read REG_CPURESET to confirm 0 is returned */
    {
        uint8_t engine_status;
        /* Read REG_CPURESET to check if engines are ready.
        Bit 0 for coprocessor engine,
        Bit 1 for touch engine,
        Bit 2 for audio engine.
        */
        engine_status = Gpu_Hal_Rd8(host, REG_CPURESET);
        while(engine_status != 0x00)
        {
            if (engine_status & 0x01){
                printf("coprocessor engine is not ready \n");
            } 
            if (engine_status & 0x02){
                printf("touch engine is not ready \n");
            } 
            if (engine_status & 0x04){
                printf("audio engine is not ready \n");
            } 
            
            engine_status = Gpu_Hal_Rd8(host, REG_CPURESET);
            delay(100);
        }
        printf("All engines are ready \n");
    }   
    
    /* Configuration of LCD display */
 
#if defined(ME800A_HV35R)
    /* After recognizing the type of chip, perform the trimming if necessary */
    Gpu_ClockTrimming(host,LOW_FREQ_BOUND);
#endif
 
    Gpu_Hal_Wr16(host, REG_HCYCLE, DispHCycle);
    Gpu_Hal_Wr16(host, REG_HOFFSET, DispHOffset);
    Gpu_Hal_Wr16(host, REG_HSYNC0, DispHSync0);
    Gpu_Hal_Wr16(host, REG_HSYNC1, DispHSync1);
    Gpu_Hal_Wr16(host, REG_VCYCLE, DispVCycle);
    Gpu_Hal_Wr16(host, REG_VOFFSET, DispVOffset);
    Gpu_Hal_Wr16(host, REG_VSYNC0, DispVSync0);
    Gpu_Hal_Wr16(host, REG_VSYNC1, DispVSync1);
    Gpu_Hal_Wr8(host, REG_SWIZZLE, DispSwizzle);
    Gpu_Hal_Wr8(host, REG_PCLK_POL, DispPCLKPol);
    Gpu_Hal_Wr16(host, REG_HSIZE, DispWidth);
    Gpu_Hal_Wr16(host, REG_VSIZE, DispHeight);
    Gpu_Hal_Wr16(host, REG_CSPREAD, DispCSpread);
    Gpu_Hal_Wr16(host, REG_DITHER, DispDither);
 
#if (defined(FT800_ENABLE) || defined(FT810_ENABLE) ||defined(FT812_ENABLE))
    /* Touch configuration - configure the resistance value to 1200 - this value is specific to customer requirement and derived by experiment */
    Gpu_Hal_Wr16(host, REG_TOUCH_RZTHRESH,RESISTANCE_THRESHOLD);
#endif
#if defined(FT81X_ENABLE)
    Gpu_Hal_Wr16(host, REG_GPIOX_DIR, 0xffff);
    Gpu_Hal_Wr16(host, REG_GPIOX, 0xffff);
#else
    Gpu_Hal_Wr8(host, REG_GPIO_DIR,0xff);
    Gpu_Hal_Wr8(host, REG_GPIO,0xff);
#endif
 
    /*Clear the screen */
    Gpu_Hal_WrMem(host, RAM_DL,(uint8_t *)DLCODE_BOOTUP,sizeof(DLCODE_BOOTUP));
    Gpu_Hal_Wr8(host, REG_DLSWAP,DLSWAP_FRAME);
    Gpu_Hal_Wr8(host, REG_PCLK,DispPCLK);//after this display is visible on the LCD
 
#ifdef ENABLE_ILI9488_HVGA_PORTRAIT
    /* to cross check reset pin */
    Gpu_Hal_Wr8(host, REG_GPIO,0xff);
    delay(120);
    Gpu_Hal_Wr8(host, REG_GPIO,0x7f);
    delay(120);
    Gpu_Hal_Wr8(host, REG_GPIO,0xff);
 
    /* Boot ILI9488 */
    ILI9488_Bootup();
 
#endif
 
    /* make the spi to quad mode - addition 2 bytes for silicon */
#ifdef FT81X_ENABLE
    /* api to set quad and numbe of dummy bytes */
#ifdef ENABLE_SPI_QUAD
    Gpu_Hal_SetSPI(host,GPU_SPI_QUAD_CHANNEL,GPU_SPI_TWODUMMY);
#elif ENABLE_SPI_DUAL
    Gpu_Hal_SetSPI(host,GPU_SPI_DUAL_CHANNEL,GPU_SPI_TWODUMMY);
#else
    Gpu_Hal_SetSPI(host,GPU_SPI_SINGLE_CHANNEL,GPU_SPI_ONEDUMMY);
#endif
 
#endif
 
    host->cmd_fifo_wp = Gpu_Hal_Rd16(host,REG_CMD_WRITE);
 
    #ifdef USE_SDCARD 
    /* Init HW Hal */
    pinMode(SDCARD_CS,OUTPUT);
    digitalWrite(SDCARD_CS,HIGH);
    delay(100);
    /* Init ARDUINO SDcard */
    sd_present =  imageFile.SD.begin(SDCARD_CS); 
    SPI.setClockDivider(SPI_CLOCK_DIV2);
    SPI.setBitOrder(MSBFIRST);
    SPI.setDataMode(SPI_MODE0); 
    if(!sd_present){
        while(1){
            Gpu_CoCmd_Dlstart(host);        // start
            Gpu_Hal_WrCmd32(host,CLEAR(1,1,1));
            Gpu_Hal_WrCmd32(host,COLOR_RGB(255,255,255));
            Gpu_CoCmd_Text(host,DispWidth>>1,DispHeight>>1,29,OPT_CENTER,"Storage Device not Found");
            Gpu_Hal_WrCmd32(host,DISPLAY());
            Gpu_CoCmd_Swap(host);
            EVE_Cmd_waitFlush(host);
        }
    }
    #endif
 
}

EVE_Cmd_waitFlush()

void EVE_Cmd_waitFlush

(

EVE_HalContext *

phost

)

Wait for the command buffer to fully empty. Returns false in case a coprocessor fault occurred

Definition at line 775 of file Gpu_Hal.cpp.

{
    while(Gpu_Hal_Rd16(host,REG_CMD_READ) != Gpu_Hal_Rd16(host,REG_CMD_WRITE));
 
    host->cmd_fifo_wp = Gpu_Hal_Rd16(host,REG_CMD_WRITE);
}

EVE_Cmd_waitFlush_status()

uint8_t EVE_Cmd_waitFlush_status

(

EVE_HalContext *

host

)

Definition at line 829 of file Gpu_Hal.cpp.

{
    if(Gpu_Hal_Rd16(host,REG_CMD_READ) != Gpu_Hal_Rd16(host,REG_CMD_WRITE))
    {
        return 0;
    }
    else
    {
        host->cmd_fifo_wp = Gpu_Hal_Rd16(host,REG_CMD_WRITE);
        return 1;
    }  
}

Fifo_GetFreeSpace()

uint32_t Fifo_GetFreeSpace	(	EVE_HalContext *	host,
		Fifo_t *	pFifo
	)

Definition at line 1111 of file Gpu_Hal.cpp.

{
    uint32_t FreeSpace = 0;
 
    Fifo_Update(host,pFifo);
 
    if(pFifo->fifo_wp >= pFifo->fifo_rp)
    {
        FreeSpace = pFifo->fifo_len - pFifo->fifo_wp + pFifo->fifo_rp;
    }
    else
    {
        FreeSpace = pFifo->fifo_rp - pFifo->fifo_wp;
    }
 
    if(FreeSpace >= 4)
    {
        FreeSpace -= 4;//make sure 1 word space is maintained between rd and wr pointers
    }
    return FreeSpace;
}

Fifo_Init()

void Fifo_Init	(	Fifo_t *	pFifo,
		uint32_t	StartAddress,
		uint32_t	Length,
		uint32_t	HWReadRegAddress,
		uint32_t	HWWriteRegAddress
	)

Definition at line 982 of file Gpu_Hal.cpp.

{
    /* update the context parameters */
    pFifo->fifo_buff = StartAddress;
    pFifo->fifo_len = Length;
    pFifo->fifo_rp = pFifo->fifo_wp = 0;
 
    /* update the hardware register addresses - specific to FT800 series chips */
    pFifo->HW_Read_Reg = HWReadRegAddress;
    pFifo->HW_Write_Reg = HWWriteRegAddress;
}

Fifo_Update()

void Fifo_Update	(	EVE_HalContext *	host,
		Fifo_t *	pFifo
	)

Definition at line 1001 of file Gpu_Hal.cpp.

{
    pFifo->fifo_rp = Gpu_Hal_Rd32(host,pFifo->HW_Read_Reg);
    //Gpu_Hal_Wr32(host,pFifo->HW_Write_Reg,pFifo->fifo_wp);
}

Fifo_Write()

uint32_t Fifo_Write	(	EVE_HalContext *	host,
		Fifo_t *	pFifo,
		uint8_t *	buffer,
		uint32_t	NumbytetoWrite
	)

Definition at line 1014 of file Gpu_Hal.cpp.

{
    uint32_t FreeSpace = Fifo_GetFreeSpace(host,pFifo),TotalBytes = NumbytetoWrite;
 
    if(NumbytetoWrite > FreeSpace)
    {
        /* update the read pointer and get the free space */
        Fifo_Update(host,pFifo);
        FreeSpace = Fifo_GetFreeSpace(host,pFifo);
 
        if(NumbytetoWrite > FreeSpace)
        {
            TotalBytes = FreeSpace;
        }
    }
 
    /* sanity check */
    if(TotalBytes <= 0)
    {
        //printf("no space in fifo write %d %d %d %d\n",TotalBytes,FreeSpace,pFifo->fifo_wp,pFifo->fifo_rp);
        return 0;//error condition
    }
    /* check for the loopback conditions */
    if((pFifo->fifo_wp + TotalBytes) >= pFifo->fifo_len)
    {
        uint32_t partialchunk = pFifo->fifo_len - pFifo->fifo_wp,secpartialchunk = TotalBytes - partialchunk;
 
        Gpu_Hal_WrMem(host,pFifo->fifo_buff + pFifo->fifo_wp,buffer,partialchunk);
        if(secpartialchunk > 0)
        {
            Gpu_Hal_WrMem(host,pFifo->fifo_buff,buffer + partialchunk,secpartialchunk);
        }
        pFifo->fifo_wp = secpartialchunk;
        //printf("partial chunks %d %d %d %d\n",partialchunk,secpartialchunk,pFifo->fifo_wp,pFifo->fifo_rp);
 
    }
    else
    {
        Gpu_Hal_WrMem(host,pFifo->fifo_buff + pFifo->fifo_wp,buffer,TotalBytes);
        pFifo->fifo_wp += TotalBytes;
    }
 
    /* update the write pointer address in write register */
    Gpu_Hal_Wr32(host,pFifo->HW_Write_Reg,pFifo->fifo_wp);
 
    return TotalBytes;
}

Fifo_Write32()

void Fifo_Write32	(	EVE_HalContext *	host,
		Fifo_t *	pFifo,
		uint32_t	WriteWord
	)

Definition at line 1069 of file Gpu_Hal.cpp.

{
    Fifo_WriteWait(host,pFifo,(uint8_t *)&WriteWord,4);
}

Fifo_WriteWait()

void Fifo_WriteWait	(	EVE_HalContext *	host,
		Fifo_t *	pFifo,
		uint8_t *	buffer,
		uint32_t	Numbyte
	)

Definition at line 1082 of file Gpu_Hal.cpp.

{
    uint32_t TotalBytes = Numbyte,currchunk = 0,FreeSpace;
    uint8_t *pbuff = buffer;
    /* blocking call, manage to check for the error case and break in case of error */
    while(TotalBytes > 0)
    {
        currchunk = TotalBytes;
        FreeSpace = Fifo_GetFreeSpace(host,pFifo);
        if(currchunk > FreeSpace)
        {
            currchunk = FreeSpace;
        }
 
        Fifo_Write(host,pFifo,pbuff,currchunk);
        pbuff += currchunk;
        TotalBytes -= currchunk;
 
    }
}

Gpu_ClearScreen()

void Gpu_ClearScreen

(

EVE_HalContext *

host

)

Definition at line 1162 of file Gpu_Hal.cpp.

{
    Gpu_Hal_WrMem(host, RAM_DL,(uint8_t *)DLCODE_BOOTUP,sizeof(DLCODE_BOOTUP));
    Gpu_Hal_Wr8(host, REG_DLSWAP,DLSWAP_FRAME);
}

Gpu_ClockSelect()

void Gpu_ClockSelect	(	EVE_HalContext *	host,
		GPU_PLL_SOURCE_T	pllsource
	)

Definition at line 556 of file Gpu_Hal.cpp.

{
    Gpu_HostCommand(host,pllsource);
}

Gpu_ClockTrimming()

int32_t Gpu_ClockTrimming	(	EVE_HalContext *	host,
		int32_t	LowFreq
	)

Definition at line 1139 of file Gpu_Hal.cpp.

{
    uint32_t f;
    uint8_t i;
 
    /* Trim the internal clock by increase the REG_TRIM register till the measured frequency is within the acceptable range.*/
    for (i=0; (i < 31) && ((f= Gpu_CurrentFrequency(host)) < LowFreq); i++)
    {
        Gpu_Hal_Wr8(host,REG_TRIM, i);  /* increase the REG_TRIM register value automatically increases the internal clock */
 
    }
 
    Gpu_Hal_Wr32(host,REG_FREQUENCY,f);  /* Set the final frequency to be used for internal operations */
 
    return f;
}

Gpu_Cmdfifo_Freespace()

uint16_t Gpu_Cmdfifo_Freespace

(

EVE_HalContext *

host

)

Definition at line 697 of file Gpu_Hal.cpp.

{
    uint16_t fullness,retval;
 
    //host->cmd_fifo_wp = Gpu_Hal_Rd16(host,REG_CMD_WRITE);
 
    fullness = (host->cmd_fifo_wp - Gpu_Hal_Rd16(host,REG_CMD_READ)) & FIFO_SIZE_MASK;
    retval = (CMD_FIFO_SIZE - 4) - fullness;
    return (retval);
}

Gpu_CoreReset()

void Gpu_CoreReset

(

EVE_HalContext *

host

)

Definition at line 589 of file Gpu_Hal.cpp.

{
    Gpu_HostCommand(host,GPU_CORE_RESET);
}

Gpu_CurrentFrequency()

uint32_t Gpu_CurrentFrequency

(

EVE_HalContext *

host

)

Definition at line 536 of file Gpu_Hal.cpp.

{
    uint32_t t0, t1;
    uint32_t addr = REG_CLOCK;
    uint8_t spidata[4];
    int32_t r = 15625;
 
    t0 = Gpu_Hal_Rd32(host,REG_CLOCK); /* t0 read */
    delayMicroseconds(15625);
 
    t1 = Gpu_Hal_Rd32(host,REG_CLOCK); /* t1 read */
    return ((t1 - t0) * 64); /* bitshift 6 places is the same as multiplying 64 */
}

Gpu_Hal_CheckCmdBuffer()

void Gpu_Hal_CheckCmdBuffer	(	EVE_HalContext *	host,
		uint32_t	count
	)

Definition at line 759 of file Gpu_Hal.cpp.

{
    uint16_t getfreespace;
    do{
        getfreespace = Gpu_Cmdfifo_Freespace(host);
    }while(getfreespace < count);
}

Gpu_Hal_Close()

void Gpu_Hal_Close

(

EVE_HalContext *

host

)

Definition at line 99 of file Gpu_Hal.cpp.

{
    host->status = GPU_HAL_CLOSED;
    SPI.end();
}

Gpu_Hal_Dec2Ascii()

int32_t Gpu_Hal_Dec2Ascii	(	char8_t *	pSrc,
		int32_t	value
	)

Definition at line 902 of file Gpu_Hal.cpp.

{
    int16_t Length;
    char8_t *pdst,charval;
    int32_t CurrVal = value,tmpval,i;
    char8_t tmparray[16],idx = 0;
 
    Length = strlen(pSrc);
    pdst = pSrc + Length;
 
    if(0 == value)
    {
        *pdst++ = '0';
        *pdst++ = '\0';
        return 0;
    }
 
    if(CurrVal < 0)
    {
        *pdst++ = '-';
        CurrVal = - CurrVal;
    }
    /* insert the value */
    while(CurrVal > 0){
        tmpval = CurrVal;
        CurrVal /= 10;
        tmpval = tmpval - CurrVal*10;
        charval = '0' + tmpval;
        tmparray[idx++] = charval;
    }
 
    for(i=0;i<idx;i++)
    {
        *pdst++ = tmparray[idx - i - 1];
    }
    *pdst++ = '\0';
 
    return 0;
}

Gpu_Hal_DeInit()

void Gpu_Hal_DeInit

(

)

Definition at line 111 of file Gpu_Hal.cpp.

{
    //Nothing to do
}

Gpu_Hal_DLSwap()

void Gpu_Hal_DLSwap	(	EVE_HalContext *	host,
		uint8_t	DL_Swap_Type
	)

Definition at line 496 of file Gpu_Hal.cpp.

{
    uint8_t Swap_Type = DLSWAP_FRAME,Swap_Done = DLSWAP_FRAME;
 
    if(DL_Swap_Type == DLSWAP_LINE)
    {
        Swap_Type = DLSWAP_LINE;
    }
 
    /* Perform a new DL swap */
    Gpu_Hal_Wr8(host,REG_DLSWAP,Swap_Type);
 
    /* Wait till the swap is done */
    while(Swap_Done)
    {
        Swap_Done = Gpu_Hal_Rd8(host,REG_DLSWAP);
        if(DLSWAP_DONE != Swap_Done)
        {
            Gpu_Hal_Sleep(1);//wait for 1ms
        }
    }
}

Gpu_Hal_EndTransfer()

void Gpu_Hal_EndTransfer

(

EVE_HalContext *

host

)

Definition at line 244 of file Gpu_Hal.cpp.

{
    digitalWrite(host->hal_config.spi_cs_pin_no, HIGH);
    host->status = GPU_HAL_OPENED;
}

Gpu_Hal_Init()

bool_t Gpu_Hal_Init

(

Gpu_HalInit_t *

halinit

)

Definition at line 59 of file Gpu_Hal.cpp.

{
    return TRUE;
}

Gpu_Hal_LoadImageToMemory()

void Gpu_Hal_LoadImageToMemory	(	EVE_HalContext *	host,
		char8_t *	fileName,
		uint32_t	destination,
		uint8_t	type
	)

Definition at line 1361 of file Gpu_Hal.cpp.

                                                                                                           {
 
    #ifdef USE_SDCARD
    int32_t FileLen = 0;
    uint8_t imbuff[512];  //the SD library requires a mandatory of 512 bytes of buffer during its operation.
    //uint16_t blocklen;
    byte file;
    
    if(type==LOADIMAGE){  //loadimage command takes destination address and options before the actual bitmap data
        Gpu_Hal_WrCmd32(host,  CMD_LOADIMAGE);
        Gpu_Hal_WrCmd32(host,  destination);
        Gpu_Hal_WrCmd32(host,  OPT_NODL);
    }
    else if(type==INFLATE){ //inflate command takes destination address before the actual bitmap
        Gpu_Hal_WrCmd32(host,  CMD_INFLATE);
        Gpu_Hal_WrCmd32(host,  destination);
    }
    else if(type==LOAD){ //load bitmaps directly
    }
 
    file = imageFile.openfile(fileName);
 
    if(file){
        while (imageFile.offset < imageFile.size)
        {
            uint16_t n = min(512, imageFile.size - imageFile.offset);
            n = (n + 3) & ~3;   // force 32-bit alignment
            imageFile.readsector(imbuff);
            if(type==LOAD)
            {
                Gpu_Hal_WrMem(host,destination,imbuff, n);//alignment is already taken care by this api
                destination += n;
            }
            else
            {
                Gpu_Hal_WrCmdBuf_nowait(host,imbuff, n);//transfer data completely and check/wait for the last chunk only
            }
 
        }
    }
    else
    {
        Gpu_CoCmd_Dlstart(host);        // start
        Gpu_Hal_WrCmd32(host,CLEAR(1,1,1));
        Gpu_Hal_WrCmd32(host,COLOR_RGB(255,255,255));
        Gpu_CoCmd_Text(host,DispWidth>>1,DispHeight>>1,29,OPT_CENTER,"File not Found");
        Gpu_CoCmd_Text(host,DispWidth>>1,(DispHeight>>1)+30,29,OPT_CENTER,fileName);
        Gpu_Hal_WrCmd32(host,DISPLAY());
        Gpu_CoCmd_Swap(host);
        EVE_Cmd_waitFlush(host);    
    }
    #endif
 
}

Gpu_Hal_Open()

bool_t Gpu_Hal_Open

(

EVE_HalContext *

host

)

Definition at line 72 of file Gpu_Hal.cpp.

{
    bool_t ret = TRUE;
 
    pinMode(host->hal_config.pdn_pin_no, OUTPUT);
    digitalWrite(host->hal_config.pdn_pin_no, HIGH);
    pinMode(host->hal_config.spi_cs_pin_no, OUTPUT);
    digitalWrite(host->hal_config.spi_cs_pin_no, HIGH);
    SPI.begin();
    SPI.setClockDivider(SPI_CLOCK_DIV2);
    SPI.setBitOrder(MSBFIRST);
    SPI.setDataMode(SPI_MODE0);
 
    /* Initialize the context valriables */
    host->cmd_fifo_wp = host->dl_buff_wp = 0;
    host->spinumdummy = GPU_SPI_ONEDUMMY; //by default ft800/801/810/811 goes with single dummy byte for read    
    host->status = GPU_HAL_OPENED;
 
    return ret;    
}

Gpu_Hal_Powercycle()

void Gpu_Hal_Powercycle	(	EVE_HalContext *	host,
		bool_t	up
	)

Definition at line 408 of file Gpu_Hal.cpp.

{
 
    if (up)
    {
        digitalWrite(host->hal_config.pdn_pin_no, LOW);
        Gpu_Hal_Sleep(20);
 
        digitalWrite(host->hal_config.pdn_pin_no, HIGH);
        Gpu_Hal_Sleep(20);
    }
    else
    {
        digitalWrite(host->hal_config.pdn_pin_no, HIGH);
        Gpu_Hal_Sleep(20);
        
        digitalWrite(host->hal_config.pdn_pin_no, LOW);
        Gpu_Hal_Sleep(20);
    }
}

Gpu_Hal_Rd16()

uint16_t Gpu_Hal_Rd16	(	EVE_HalContext *	host,
		uint32_t	addr
	)

Definition at line 303 of file Gpu_Hal.cpp.

{
    uint16_t value;
 
    Gpu_Hal_StartTransfer(host,GPU_READ,addr);
    value = Gpu_Hal_Transfer16(host,0);
    Gpu_Hal_EndTransfer(host);
 
    return value;
}

Gpu_Hal_Rd32()

uint32_t Gpu_Hal_Rd32	(	EVE_HalContext *	host,
		uint32_t	addr
	)

Definition at line 320 of file Gpu_Hal.cpp.

{
    uint32_t value;
 
    Gpu_Hal_StartTransfer(host,GPU_READ,addr);
    value = Gpu_Hal_Transfer32(host,0);
    Gpu_Hal_EndTransfer(host);
    
    return value;
}

Gpu_Hal_Rd8()

uint8_t Gpu_Hal_Rd8	(	EVE_HalContext *	host,
		uint32_t	addr
	)

Definition at line 286 of file Gpu_Hal.cpp.

{
    uint8_t value = 0;   
 
    Gpu_Hal_StartTransfer(host,GPU_READ,addr);
    value = Gpu_Hal_Transfer8(host,0);
    Gpu_Hal_EndTransfer(host);
 
    return value;
}

Gpu_Hal_RdMem()

void Gpu_Hal_RdMem	(	EVE_HalContext *	host,
		uint32_t	addr,
		uint8_t *	buffer,
		uint32_t	length
	)

Definition at line 474 of file Gpu_Hal.cpp.

{
    uint32_t SizeTransfered = 0;      
    Gpu_Hal_StartTransfer(host,GPU_READ,addr);
 
    while (length--) {
        *buffer = Gpu_Hal_Transfer8(host,0);
        buffer++;
    }
    Gpu_Hal_EndTransfer(host);
 
}

Gpu_Hal_ResetCmdFifo()

void Gpu_Hal_ResetCmdFifo

(

EVE_HalContext *

host

)

Definition at line 865 of file Gpu_Hal.cpp.

{
    host->cmd_fifo_wp = 0;
}

Gpu_Hal_ResetDLBuffer()

void Gpu_Hal_ResetDLBuffer

(

EVE_HalContext *

host

)

Definition at line 891 of file Gpu_Hal.cpp.

{
    host->dl_buff_wp = 0;
}

Gpu_Hal_Sleep()

void Gpu_Hal_Sleep

(

uint32_t

ms

)

Definition at line 525 of file Gpu_Hal.cpp.

{
    delay(ms);
}

Gpu_Hal_StartCmdTransfer()

void Gpu_Hal_StartCmdTransfer	(	EVE_HalContext *	host,
		GPU_TRANSFERDIR_T	rw,
		uint16_t	count
	)

Definition at line 155 of file Gpu_Hal.cpp.

{     
    Gpu_Hal_StartTransfer(host,rw,host->cmd_fifo_wp + RAM_CMD);    
}

Gpu_Hal_StartTransfer()

void Gpu_Hal_StartTransfer	(	EVE_HalContext *	host,
		GPU_TRANSFERDIR_T	rw,
		uint32_t	addr
	)

Definition at line 123 of file Gpu_Hal.cpp.

{
    if (GPU_READ == rw)
    {
        //EVE mem read
        digitalWrite(host->hal_config.spi_cs_pin_no, LOW);
        SPI.transfer(addr >> 16);
        SPI.transfer(highByte(addr));
        SPI.transfer(lowByte(addr));
 
        SPI.transfer(0); //Dummy Read Byte
 
        host->status = GPU_HAL_READING;
    }
    else
    {
        //EVE mem write
        digitalWrite(host->hal_config.spi_cs_pin_no, LOW);
        SPI.transfer(0x80 | (addr >> 16));
        SPI.transfer(highByte(addr));
        SPI.transfer(lowByte(addr));
 
        host->status = GPU_HAL_WRITING;
    }
}

Gpu_Hal_Transfer16()

uint16_t Gpu_Hal_Transfer16	(	EVE_HalContext *	host,
		uint16_t	value
	)

Definition at line 193 of file Gpu_Hal.cpp.

{
    uint16_t retVal = 0;
 
    if (host->status == GPU_HAL_WRITING)
    {
        SPI.transfer(value & 0xFF);//LSB first
        SPI.transfer((value >> 8) & 0xFF);
    }
    else
    {
        retVal = SPI.transfer(0);
        retVal |= (uint16_t)SPI.transfer(0) << 8;
    }
 
    return retVal;
}

Gpu_Hal_Transfer32()

uint32_t Gpu_Hal_Transfer32	(	EVE_HalContext *	host,
		uint32_t	value
	)

Definition at line 217 of file Gpu_Hal.cpp.

{
    uint32_t retVal = 0;
    
    if (host->status == GPU_HAL_WRITING)
    {
        SPI.transfer(value & 0xFF);//LSB first
        SPI.transfer((value >> 8) & 0xFF);
        SPI.transfer((value >> 16) & 0xFF);
        SPI.transfer((value >> 24) & 0xFF);
    }
    else
    {
        retVal = SPI.transfer(0);
        retVal |= (uint32_t)SPI.transfer(0) << 8;
        retVal |= (uint32_t)SPI.transfer(0) << 16;
        retVal |= (uint32_t)SPI.transfer(0) << 24;
    }
    return retVal;
}

Gpu_Hal_Transfer8()

uint8_t Gpu_Hal_Transfer8	(	EVE_HalContext *	host,
		uint8_t	value
	)

Definition at line 183 of file Gpu_Hal.cpp.

{
    return SPI.transfer(value);
}

Gpu_Hal_TransferString()

void Gpu_Hal_TransferString	(	EVE_HalContext *	host,
		const char8_t *	string
	)

Definition at line 166 of file Gpu_Hal.cpp.

{    
    uint16_t length = strlen(string);
    while(length --)
    {
        Gpu_Hal_Transfer8(host,*string);
        string ++;
    }
    //Append one null as ending flag
    Gpu_Hal_Transfer8(host,0);    
}

Gpu_Hal_Updatecmdfifo()

void Gpu_Hal_Updatecmdfifo	(	EVE_HalContext *	host,
		uint32_t	count
	)

Definition at line 680 of file Gpu_Hal.cpp.

{
    host->cmd_fifo_wp  = (host->cmd_fifo_wp + count) & FIFO_SIZE_MASK;
 
    //4 byte alignment
    host->cmd_fifo_wp = (host->cmd_fifo_wp + 3) & FIFO_BYTE_ALIGNMENT_MASK;
    Gpu_Hal_Wr16(host,REG_CMD_WRITE,host->cmd_fifo_wp);
}

Gpu_Hal_WaitLogo_Finish()

void Gpu_Hal_WaitLogo_Finish

(

EVE_HalContext *

host

)

Definition at line 848 of file Gpu_Hal.cpp.

{
    int16_t cmdrdptr,cmdwrptr;
 
    do{
        cmdrdptr = Gpu_Hal_Rd16(host,REG_CMD_READ);
        cmdwrptr = Gpu_Hal_Rd16(host,REG_CMD_WRITE);
    }while ((cmdwrptr != cmdrdptr) || (cmdrdptr != 0));
    host->cmd_fifo_wp = 0;
}

Gpu_Hal_Wr16()

void Gpu_Hal_Wr16	(	EVE_HalContext *	host,
		uint32_t	addr,
		uint16_t	v
	)

Definition at line 350 of file Gpu_Hal.cpp.

{
    Gpu_Hal_StartTransfer(host,GPU_WRITE,addr);
    Gpu_Hal_Transfer16(host,v);
    Gpu_Hal_EndTransfer(host);
}

Gpu_Hal_Wr32()

void Gpu_Hal_Wr32	(	EVE_HalContext *	host,
		uint32_t	addr,
		uint32_t	v
	)

Definition at line 363 of file Gpu_Hal.cpp.

{
    Gpu_Hal_StartTransfer(host,GPU_WRITE,addr);
    Gpu_Hal_Transfer32(host,v);
    Gpu_Hal_EndTransfer(host);
}

Gpu_Hal_Wr8()

void Gpu_Hal_Wr8	(	EVE_HalContext *	host,
		uint32_t	addr,
		uint8_t	v
	)

Definition at line 337 of file Gpu_Hal.cpp.

{    
    Gpu_Hal_StartTransfer(host,GPU_WRITE,addr);
    Gpu_Hal_Transfer8(host,v);
    Gpu_Hal_EndTransfer(host);
}

Gpu_Hal_WrCmd32()

void Gpu_Hal_WrCmd32	(	EVE_HalContext *	host,
		uint32_t	cmd
	)

Definition at line 876 of file Gpu_Hal.cpp.

{
    Gpu_Hal_CheckCmdBuffer(host,sizeof(cmd));
    
    Gpu_Hal_Wr32(host,RAM_CMD + host->cmd_fifo_wp,cmd);
    
    Gpu_Hal_Updatecmdfifo(host,sizeof(cmd));
}

Gpu_Hal_WrCmdBuf()

void Gpu_Hal_WrCmdBuf	(	EVE_HalContext *	host,
		uint8_t *	buffer,
		uint32_t	count
	)

Definition at line 717 of file Gpu_Hal.cpp.

{
    uint32_t length =0, SizeTransfered = 0,availablefreesize;
 
    do 
    {                
        length = count;
        availablefreesize = Gpu_Cmdfifo_Freespace(host);
 
        if (length > availablefreesize)
        {
            length = availablefreesize;
        }
        Gpu_Hal_CheckCmdBuffer(host,length);
 
        Gpu_Hal_StartCmdTransfer(host,GPU_WRITE,length); 
 
        SizeTransfered = 0;
        while (length--) {
            Gpu_Hal_Transfer8(host,*buffer);
            buffer++;
            SizeTransfered ++;
        }
        length = SizeTransfered;
 
        Gpu_Hal_EndTransfer(host);
        Gpu_Hal_Updatecmdfifo(host,length);
 
        EVE_Cmd_waitFlush(host);
 
        count -= length;
    }while (count > 0);
}

Gpu_Hal_WrCmdBuf_nowait()

void Gpu_Hal_WrCmdBuf_nowait	(	EVE_HalContext *	host,
		uint8_t *	buffer,
		uint32_t	count
	)

Definition at line 788 of file Gpu_Hal.cpp.

{
    uint32_t length =0, SizeTransfered = 0 , availablefreesize;
 
    do {                
        length = count;
        availablefreesize = Gpu_Cmdfifo_Freespace(host);
 
        if (length > availablefreesize)
        {
            length = availablefreesize;
        }
        Gpu_Hal_CheckCmdBuffer(host,length);
 
        Gpu_Hal_StartCmdTransfer(host,GPU_WRITE,length);
 
        SizeTransfered = 0;
        while (length--)
        {
            Gpu_Hal_Transfer8(host,*buffer);
            buffer++;
            SizeTransfered ++;
        }
        length = SizeTransfered;
 
        Gpu_Hal_EndTransfer(host);
 
        Gpu_Hal_Updatecmdfifo(host,length);
 
        //    EVE_Cmd_waitFlush(host);
 
        count -= length;
    }while (count > 0);
}

Gpu_Hal_WrCmdBufFromFlash()

void Gpu_Hal_WrCmdBufFromFlash	(	EVE_HalContext *	host,
		PROGMEM prog_uchar8_t *	buffer,
		uint32_t	count
	)

Definition at line 250 of file Gpu_Hal.cpp.

{
    uint32_t length =0, SizeTransfered = 0, getfreespace;  
    do {                
        length = count;
        getfreespace = Gpu_Cmdfifo_Freespace(host);
        if (length > getfreespace){
            length = getfreespace;
        }
        Gpu_Hal_CheckCmdBuffer(host,length);
 
        Gpu_Hal_StartCmdTransfer(host,GPU_WRITE,length);
 
        SizeTransfered = 0;
        while (length--) {
            Gpu_Hal_Transfer8(host,pgm_read_byte_near(buffer));
            buffer++;
            SizeTransfered ++;
        }
        length = SizeTransfered;
 
        Gpu_Hal_EndTransfer(host);
        Gpu_Hal_Updatecmdfifo(host,length);
 
        EVE_Cmd_waitFlush(host);
 
        count -= length;
    }while (count > 0);
}

Gpu_Hal_WrMem()

void Gpu_Hal_WrMem	(	EVE_HalContext *	host,
		uint32_t	addr,
		const uint8_t *	buffer,
		uint32_t	length
	)

Definition at line 455 of file Gpu_Hal.cpp.

{
    uint32_t SizeTransfered = 0;      
    Gpu_Hal_StartTransfer(host,GPU_WRITE,addr);
    while (length--)
    {
        Gpu_Hal_Transfer8(host,*buffer);
        buffer++;
    }
    Gpu_Hal_EndTransfer(host);
 
}

Gpu_Hal_WrMemFromFlash()

void Gpu_Hal_WrMemFromFlash	(	EVE_HalContext *	host,
		uint32_t	addr,
		const prog_uchar8_t *	buffer,
		uint32_t	length
	)

Definition at line 436 of file Gpu_Hal.cpp.

{
    uint32_t SizeTransfered = 0;      
 
    Gpu_Hal_StartTransfer(host, GPU_WRITE, addr);
    while (length--) {
        Gpu_Hal_Transfer8(host,pgm_read_byte_near(buffer));
        buffer++;
    }
    Gpu_Hal_EndTransfer(host);
}

Gpu_HostCommand()

void Gpu_HostCommand	(	EVE_HalContext *	host,
		uint8_t	cmd
	)

Definition at line 377 of file Gpu_Hal.cpp.

{
    digitalWrite(host->hal_config.spi_cs_pin_no, LOW);
    SPI.transfer(cmd);
    SPI.transfer(0);
    SPI.transfer(0);
    digitalWrite(host->hal_config.spi_cs_pin_no, HIGH);
}

Gpu_HostCommand_Ext3()

void Gpu_HostCommand_Ext3	(	EVE_HalContext *	host,
		uint32_t	cmd
	)

Definition at line 392 of file Gpu_Hal.cpp.

{
    digitalWrite(host->hal_config.spi_cs_pin_no, LOW);
    SPI.transfer(cmd);
    SPI.transfer((cmd>>8) & 0xff);
    SPI.transfer((cmd>>16) & 0xff);
    digitalWrite(host->hal_config.spi_cs_pin_no, HIGH);
 
}

Gpu_PLL_FreqSelect()

void Gpu_PLL_FreqSelect	(	EVE_HalContext *	host,
		GPU_PLL_FREQ_T	freq
	)

Definition at line 567 of file Gpu_Hal.cpp.

{
    Gpu_HostCommand(host,freq);
}

Gpu_PowerModeSwitch()

void Gpu_PowerModeSwitch	(	EVE_HalContext *	host,
		GPU_POWER_MODE_T	pwrmode
	)

Definition at line 578 of file Gpu_Hal.cpp.

{
    Gpu_HostCommand(host,pwrmode);
}

Variable Documentation

DLCODE_BOOTUP

const uint8_t DLCODE_BOOTUP[12]

Initial value:

= 
{
    0,0,0,2,
    7,0,0,38, 
 
    0,0,0,0,  
}

Definition at line 44 of file Gpu_Hal.cpp.

{
    0,0,0,2,//GPU instruction CLEAR_COLOR_RGB
    7,0,0,38, //GPU instruction CLEAR
 
    0,0,0,0,  //GPU instruction DISPLAY
};